SystemVerilog/Verilog

Simulation tools (ModelSim, VCS, Xcelium, Vivado)

Testbench development and verification environments

Coverage-driven verification

Assertion-based verification (SVA - SystemVerilog Assertions)

Scripting languages (Python, Perl, Shell scripting)

EDA tools and CAD flows

Semiconductor design methodologies

Debugging and waveform analysis

Version control systems

Strong analytical and problem-solving abilities

Excellent communication and documentation skills

Ability to work effectively in cross-functional teams

Attention to detail and quality-oriented mindset

Time management and ability to meet deadlines

Proactive approach to identifying and resolving issues

Willingness to learn and adapt to new tools and methodologies

Collaborative team player with mentoring capabilities

Critical thinking and logical reasoning